CnMemory M2Y1G64TU88D5B-C Ficha Técnica descarregar pdf

M2Y1G64TU88D0B / M2Y2G64TU8HD0B / M2Y1G64TU88D4B / M2Y2G64TU8HD4B / M2Y1G64TU88D4B

M2Y1G64TU88D5B / M2Y2G64TU8HD5B / M2Y1G64TU88D6B / M2Y2G64TU8HD6B

M2Y1G64TU88D7B

1GB: 128M x 64 / 2GB: 256M x 64

Unbuffered DDR2 SDRAM DIMM

REV 1.2 1

10/2008

NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.

240pin Unbuffered DDR2 SDRAM MODULE

Based on 128Mx8 DDR2 SDRAM D-die

Features

Performance:

PC2-5300

PC2-6400

Unit

Speed Sort

-3C

-AC

DIMM  Latency

f CK

Clock Frequency

333

400

MHz

t CK

Clock Cycle

2.5

f DQ

DQ Burst Frequency

667

800

Mbps

• JEDEC Standard 240-pin Dual In-Line Memory Module

• 128Mx64 and 256Mx64 DDR2 Unbuffered DIMM based on

Elixir 128Mx8 DDR2 SDRAM D-die component

• Double Data Rate architecture; two data transfer per clock cycle

• Differential bi-directional data strobe (DQS & )

• DQS is edge-aligned with data for reads and is center-aligned

with data for writes

• Differential clock inputs (CK & )

• Intended for 333MHz/400MHz applications

• Inputs and outputs are SSTL-18 compatible

• V

= V

DDQ

= 1.8V ± 0.1V

• 7.8 μs Max. Average Periodic Refresh Interval

•Programmable Operation:

- Device  Latency: 3, 4, 5

- Burst Length: 4, 8

• Auto Refresh (CBR) and Self Refresh Modes

• Automatic and controlled precharge commands

• 14/10/1 Addressing (row/column/rank) – 1GB

• 14/10/2 Addressing (row/column/rank) – 2GB

• Serial Presence Detect

• On Die Termination (ODT)

• OCD impedance adjustment.

• Gold contacts

• SDRAMs in 60-ball BGA Package

• RoHs Compliance.

Description

M2Y1G64TU88D0B, M2Y2G64TU8HD0B, M2Y1G64TU88D4B, M2Y2G64TU8HD4B, M2Y1G64TU88D5B, M2Y2G64TU8HD5B,

M2Y1G64TU88D6B, M2Y2G64TU8HD6B and M2Y1G64TU88D7B are 240-Pin Double Data Rate 2 (DDR2) Synchronous DRAM

Unbuffered Dual In-Line Memory Module (UDIMM), organized as one rank 128Mx64 and two ranks 256Mx64 high-speed memory array.

M2Y1G64TU88D0B, M2Y1G64TU88D4B, M2Y1G64TU88D5B, M2Y1G64TU88D6B and M2Y1G64TU88D7B use eight 128Mx8 DDR2

SDRAMs and M2Y2G64TU8HD0B M2Y2G64TU8HD4B, M2Y2G64TU8HD5B and M2Y2G64TU8HD6B use sixteen 128Mx8 DDR2

SDRAMs in BGA packages. These DIMMs are manufactured using raw cards developed for broad industry use as reference designs.

The use of these common design files minimizes electrical variation between suppliers. All Elixir DDR2 SDRAM DIMMs provide a

high-performance, flexible 8-byte interface in a 5.25” long space-saving footprint.

The DIMM is intended for use in applications operating up to 333MHz (or 400MHz) clock speeds and achieves high-speed data transfer

rates of up to 667Mbps (or 800Mbps). Prior to any access operation, the device  latency and burst / length /operation type must be

programmed into the DIMM by address inputs A0-A13 and I/O inputs BA0, BA1 and BA2 using the mode register set cycle.

The DIMM uses serial presence-detect implemented via a serial 2,048-bit EEPROM using a standard IIC protocol. The first 128 bytes of

serial PD data are programmed and locked during module assembly. The remaining 128 bytes are available for use by the customer.

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